ARM: exynos: fix regression for Origen4210

The do_lowlevel_init() function includes certian CA15 specific L2 cache
configuration which is only applicable on Exynos5420 and members of its
family. Fix the regression on Origen4210 by skipping the Exynos5420
specific portions of the code.

Cc: Minkyu Kang <[email protected]>
Cc: Albert Aribaud <[email protected]>
Signed-off-by: Thomas Abraham <[email protected]>
Tested-by: Przemyslaw Marczak <[email protected]>
Acked-by: Przemyslaw Marczak <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>

diff --git a/arch/arm/mach-exynos/common_setup.h b/arch/arm/mach-exynos/common_setup.h
index 5235abb808a42c1a6b9ce6a90fd4eb53da5f139e..67aac2d57517b5988c637798ee739509cb796847 100644 (file)
--- a/arch/arm/mach-exynos/common_setup.h
+++ b/arch/arm/mach-exynos/common_setup.h
@@ -60,7 +60,7 @@ enum l2_cache_params {
 };
 
 
-#ifndef CONFIG_SYS_L2CACHE_OFF
+#if !defined(CONFIG_SYS_L2CACHE_OFF) && defined(CONFIG_EXYNOS5420)
 /*
  * Configure L2CTLR to get timings that keep us from hanging/crashing.
  *

diff --git a/arch/arm/mach-exynos/lowlevel_init.c b/arch/arm/mach-exynos/lowlevel_init.c
index 37746078487eda5b6339b6321754bbaafae30d37..6c39cb2052f94aabba313f3ec35275388945d4ee 100644 (file)
--- a/arch/arm/mach-exynos/lowlevel_init.c
+++ b/arch/arm/mach-exynos/lowlevel_init.c
@@ -175,7 +175,7 @@ int do_lowlevel_init(void)
 
        arch_cpu_init();
 
-#ifndef CONFIG_SYS_L2CACHE_OFF
+#if !defined(CONFIG_SYS_L2CACHE_OFF) && defined(CONFIG_EXYNOS5420)
        /*
         * Init L2 cache parameters here for use by boot and resume
         *
@@ -188,9 +188,7 @@ int do_lowlevel_init(void)
        configure_l2_actlr();
        dsb();
        isb();
-#endif
 
-#ifdef CONFIG_EXYNOS5420
        relocate_wait_code();
 
        /* Reconfigure secondary cores */